3-Dimensional Cubic Microprocessors
Posted at: October 23, 2003 02:54 PM | Comments (0) | EditIntroduction:
Until recently all increases in microprocessor complexity have come from reductions in size of their transistors and the ability to cram ever more circuitry onto the 2-dimensional surface of a silicon chip. Now however, Vertical Circuits Inc., a company located in a wafer fabrication facility in California, have come up with a way to utilise the third dimension. They do this by stacking microchips one on top of the other. Their patented technology allows semiconductor wafers or individual die to be vertically interconnected. This can be achieved equally with both identical and dissimilar die.
The Process:
Silicon chips are usually only 0.2 to 0.3 mm thick. However the packages they must come in stand between 1.0 and 1.2 mm high. This means that adding a second die inside the package has a proportionately very small effect on the height of a package. If the number of stacked die per package is increased beyond two then vast savings can be made in terms of volume occupied. A stack of eight to ten die will occupy a footprint which is just 10-15% of the total silicon surface area.
Vertical Circuits Inc. call their technology "Vertical Interconnection Process", or "VIP". The process involves adding layers of gold and insulating polyimide to the wafer. Polyimide is first spun on to the wafer so as to insulate any exposed metal from the original die. A layer of gold is then deposited on top to make up the connecting circuitry. Traces of these wires are then brought to the edges of the stack where the vertical connections are made. If necessary 2 layers of gold can be used and insulated with 3 layers of polyimide. The stacks are manufactured with thermally conductive material so as to readily dissipate the heat generated by each chip. The image above shows a stack of four die. Vertical interconnects can be seen at the edges.
Performance advantages:
Another advantage to this chip stacking technology, beyond savings in volume, is reduction system delays. This is because the chips are positioned so much closer together, within a single IC package as opposed to at neighbouring spots on a circuit board. Chips stacking also reduces power consumption by 15% to 20% due to increased proximity of the components.
Products:
Although the technology can be used to stack processors, Vertical Circuits have to date mainly focussed on memory chips. Memory storage densities of 30 to 50 times that of standard memory chips have been achieved. This means multiple gigabytes of memory can be packed into a cubic inch. The technology has already been used to stack dissimilar memory chips in mobile phones.
Links:
Vertical Circuits Inc.: www.verticalcircuits.com